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WM8961GEFL/V bảng dữ liệu(PDF) 54 Page - Wolfson Microelectronics plc

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Giải thích chi tiết về linh kiện  Ultra-Low Power Stereo CODEC with 1W Stereo Class D Speaker Drivers and Ground Referenced Headphone Drivers
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WM8961
Pre-Production
w
PP, August 2009, Rev 3.1
54
Figure 27 DC Servo Block Diagram
DC SERVO STARTUP OPERATION
The DC servo contains automatic control circuitry and can be configured using individual register
writes.
The DC servo can also be configured by starting a sequence using the control write sequencer (see
“Control Write Sequencer” section). Starting the pre-defined sequence from line 0 of the control write
sequencer configures the DC servo by default.
The basic startup operation of the DC servo, for example for HP_R, is to
1.
Enable the DC Servo operation on the HP_R output by configuring R61[3],
DCS_ENA_CHAN_HPR. (The HP_L, INR/L have similar enables).
2.
Trigger
a
start
up
sequence
for
the
HP_R
by
configuring
R61[2]
DCS_TRIG_STARTUP_HPR (The HP_L, INR/L have similar start up sequence enables).
Additionally, to enable the DC servo for L/RINPUT, the headphone charge pump must be enabled
(CP_ENA = 1) and MCLK must be applied.
Note that it is recommended to perform a calibration of the DC Servo input channel before using the
Input PGA Zero Cross Detector.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R60 (3Ch)
DC Servo 1
7
DCS_ENA_CHAN_INL
0
DC Servo enabled on channel INL
6
DCS_TRIG_STARTUP_INL
0
Perform startup sequence on channel INL*see note
1
3
DCS_ENA_CHAN_INR
0
DC Servo enabled on channel INR
2
DCS_TRIG_STARTUP_INR
0
Perform startup sequence on channel INR *see
note 1
R61 (3Dh)
DC Servo 1
7
DCS_ENA_CHAN_HPL
0
DC Servo enabled on channel HPL
6
DCS_TRIG_STARTUP_HPL
0
Perform startup sequence on channel HPL *see
note 1
3
DCS_ENA_CHAN_HPR
0
DC Servo enabled on channel HPR
2
DCS_TRIG_STARTUP_HPR
0
Perform startup sequence on channel HPR *see
note 1
Table 37 DC Servo Enable and Start-up Configuration
Note:
1. The “startup” bits are automatically reset to ‘0’ after 1 clock cycle.



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