TLK3114SCZPV datasheet(39/68 Pages) TI1

39 / 68 page

3−21

MDC

MDIO

DA4

DA0

A15

32 “1”s

Preamble

Start

Address Code

PHY Address

Turn Around

Dev Address

Reg

Address

Idle

Figure 3−21. Management Interface Extended Space Address Timing

MDC

MDIO

DA4

DA0

D15

32 “1”s

Preamble

Start

Write Code

PHY Address

Turn Around

Dev Address

Data

Idle

Figure 3−22. Management Interface Extended Space Write Timing

MDC

MDIO

DA4

DA0

Hi-Z

D15

32 “1”s

Preamble

Start

Read Code

PHY Address

Turn Around

Dev Address

Data

Idle

Figure 3−23. Management Interface Extended Space Read Timing

MDC

MDIO

DA4

DA0

Hi-Z

D15

32 “1”s

Preamble

Start

Read and Inc Code

PHY Address

Turn Around

Dev Address

Data

Idle

Figure 3−24. Management Interface Extended Space Read and Increment Timing

The IEEE 802.3 Clause 22 and Clause 45 specifications define many of the registers, and additional registers have

been implemented for expanded functionality. The IEEE-defined registers and the expanded functionality registers

are outlined in Table 3−12.

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