MPC8569E datasheet(119/127 Pages) FREESCALE

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Thermal Characteristics

MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

119

The following figure shows the UTOPIA/POS timing with internal clock.

Figure 72. UTOPIA/POS AC Timing (Internal Clock) Diagram

Thermal

This section describes the thermal specifications of the MPC8569E.

3.1

Thermal Characteristics

The following table provides the package thermal characteristics of the MPC8569E.

3.2

Recommended Thermal Model

Information about Flotherm models of the package or thermal data not available in this document can be obtained from your

local Freescale sales office.

Table 82. Package Thermal Characteristics

Characteristic

JEDEC Board

Symbol

Value

Unit

Notes

Junction-to-ambient Natural Convection

Single layer board (1s)

RθJA

°C/W

1, 2

Junction-to-ambient Natural Convection

Four layer board (2s2p)

RθJA

°C/W

1, 2

Junction-to-ambient (at 200 ft/min)

Single layer board (1s)

RθJA

°C/W

1, 2

Junction-to-ambient (at 200 ft/min)

Four layer board (2s2p)

RθJA

°C/W

1, 2

Junction-to-board thermal

—

RθJB

°C/W

Junction-to-case thermal

—

RθJC

1.0

°C/W

Notes:

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Per JEDEC JESD51-2 and JESD51-6 with the board (JESD51-9) horizontal.

3. Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board near the package.

4. Junction-to-case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is used

for the case temperature. Reported value includes the thermal resistance of the interface layer.

UTOPIACLK (Output)

tUIIXKH

tUIKHOV

Input Signals:

UTOPIA

Output Signals:

UTOPIA

tUIIVKH

tUIKHOX

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