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MPC8569E bảng dữ liệu(PDF) 59 Page - Freescale Semiconductor, Inc |
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MPC8569E bảng dữ liệu(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 127 page ![]() Ethernet Interface MPC8569E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 Freescale Semiconductor 59 2.6.3.4 RMII AC Timing Specifications This section describes the RMII transmit and receive AC timing specifications. 2.6.3.4.1 RMII Transmit AC Timing Specifications The following table shows the RMII transmit AC timing specifications. The following figure shows the RMII transmit AC timing diagram. Figure 19. RMII Transmit AC Timing Diagram 2.6.3.4.2 RMII Receive AC Timing Specifications The following table provides the RMII receive AC timing specifications. Table 30. RMII Transmit AC Timing Specifications For recommended operating conditions, see Table 3 Parameter Symbol Min Typ Max Unit Note REF_CLK clock period tRMT — 20.0 — ns — REF_CLK duty cycle tRMTH 35 — 65 % — REF_CLK peak-to-peak jitter tRMTJ —— 250 ps — Rise time REF_CLK (20%–80%) tRMTR 1.0 — 4.0 ns — Fall time REF_CLK (80%–20%) tRMTF 1.0 — 4.0 ns — REF_CLK to RMII data TXD[1:0], TX_EN delay tRMTDX 2.0 — 10.0 ns — Table 31. RMII Receive AC Timing Specifications For recommended operating conditions, see Table 3 Parameter Symbol Min Typ Max Unit Note REF_CLK clock period tRMR — 20.0 — ns — REF_CLK duty cycle tRMRH 35 — 65 % 1 REF_CLK peak-to-peak jitter tRMRJ — — 250 ps 1 Rise time REF_CLK (20%–80%) tRMRR 1.0 — 4.0 ns 1 REF_CLK TXD[1:0] tRMTDX tRMT tRMTH tRMTR tRMTF TX_EN TX_ER |
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