C5NPD0-DS datasheet(97/100 Pages) FREESCALE

97 / 100 page

INDEX

V 04

MDIO Serial Interface Timing Description 84

MDIO Serial Interface Timing Diagram 84

MDIO Serial Interface Timing Specifications 83

Measurements

C-5 Network Processor 94

Mechanical Specifications 93

Miscellaneous Test Signals for JTAG, Scan, and Internal Test

Routines 53

No Connection Pins 53

OC-12 Signals 38

OC-12 Timing Description 81

OC-12 Timing Specifications 81

OC-3 Signals 37

OC-3 Timing Description 80

OC-3 Timing Diagram 80

OC-3 Timing Specifications 79

Operating Conditions, Recommended 67

Package Measurements 94

PCI Signals 39

PCI Timing Description 83

PCI Timing Diagram 82

PCI Timing Specifications 82

Pin Descriptions

Grouped by Function 28

Pin Locations 28

Pin Number Signals Groups 53

Pinout Diagram 27

Power and Ground Connections (Bottom View) 52

Power Sequencing 69, 70

Power Supply Signals 50

Power X Mode, Fabric Interface Pin Mapping 47

PRIZMA Mode, C-5 Network Processor to Fabric Interface Pin

Mapping 46

Processor, Executive 22

Processor, Fabric 24

PROM Interface Diagram 42

PROM Interface Signals 41

PROM Interface Timing Description 86

PROM Interface Timing Diagram 86

PROM Interface Timing Outline 43

PROM Interface Timing Specifications 85

QMU Signal Groups 92

QMU SRAM Interface Signals 50

QMU Timing Description 91

QMU Timing Diagram 91

QMU Timing Specifications 91

Queue Management Unit 25

Recommended Operating Conditions 67

IDcode 64

JTAG Instruction 65

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