PCF2127ATSLASH1 datasheet(69/80 Pages) NXP

69 / 80 page

PCF2127A_2

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Product data sheet

Rev. 02 — 7 May 2010

69 of 80

NXP Semiconductors

PCF2127A

Integrated RTC, TCXO and quartz crystal

13. Dynamic characteristics

13.1 SPI-bus timing characteristics

[1]

No load value; bus will be held up by bus capacitance; use RC time constant with application values.

Table 63.

SPI-bus characteristics

VDD = 1.8 V to 4.2V; VSS =0V; Tamb = −40 °C to +85 °C, unless otherwise specified. All timing values are valid within the

operating supply voltage at ambient temperature and referenced to VIL and VIH with an input voltage swing of VSS to VDD.

Symbol

Parameter

Conditions

VDD =1.8 V

VDD =4.2 V

Unit

Min

Max

Min

Max

Pin SCL

fclk(SCL)

SCL clock frequency

2.0

6.5

MHz

RAM write access

2.0

6.5

MHz

RAM read access

1.11

6.25

MHz

tSCL

SCL time

800

140

RAM write access

800

140

RAM read access

900

160

tclk(H)

clock HIGH time

100

RAM write access

100

RAM read access

450

tclk(L)

clock LOW time

400

RAM write access

400

RAM read access

450

rise time

for SCL signal

100

fall time

for SCL signal

100

Pin SDA/CE

tsu(CE_N)

CE_N set-up time

th(CE_N)

CE_N hold time

trec(CE_N)

CE_N recovery time

100

tw(CE_N)

CE_N pulse width

0.99

Pin SDI

tsu

set-up time

set-up time for SDI data

hold time

hold time for SDI data

Pin SDO

td(R)SDO

SDO read delay time

CL = 50 pF

225

RAM read access

410

tdis(SDO)

SDO disable time

[1]

tt(SDI-SDO)

transition time from SDI to

SDO

to avoid bus conflict

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