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PCF2127AT/1 bảng dữ liệu(PDF) 37 Page - NXP Semiconductors |
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PCF2127AT/1 bảng dữ liệu(HTML) 37 Page - NXP Semiconductors |
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37 / 80 page ![]() PCF2127A_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 7 May 2010 37 of 80 NXP Semiconductors PCF2127A Integrated RTC, TCXO and quartz crystal Remark: WDTF is read only and cannot be cleared with the interface. WDTF can be cleared by: • loading a value in register Watchdg_tim_val • reading of the register Control_2 Writing a logic 0 or logic 1 to WDTF has no effect. • When the watchdog timer counter reaches 1, the watchdog timer flag WDTF is set logic 1 • When a minute or second interrupt occurs, the minute/second flag MSF is set logic 1 (see Section 8.13.1) Counter reached 1, WDTF is set logic 1, and an interrupt is generated. Fig 21. WD_CD[1:0] = 10: watchdog activates an interrupt when timed out Counter reached 1, WDTF is set logic 1, reset pulse on the RST pin is generated for a time equal to tw(rst). Fig 22. WD_CD[1:0] = 11: watchdog activates a reset pulse when timed out 001aag062 watchdog timer value WDTF n = 1 n MCU INT 001aag063 watchdog timer value WDTF tw(rst) n = 1 n MCU RST |
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