PCF2127ATSLASH1 datasheet(48/80 Pages) NXP

48 / 80 page

PCF2127A_2

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Product data sheet

Rev. 02 — 7 May 2010

48 of 80

NXP Semiconductors

PCF2127A

Integrated RTC, TCXO and quartz crystal

8.13.3 INT pulse shortening

The pulse generator for the countdown timer interrupt also uses an internal clock, but this

time it is dependent on the selected source clock for the countdown timer and on the

countdown value n. As a consequence, the width of the interrupt pulse varies (see

Table 54).

[1]

n = loaded countdown value. Timer stopped when n = 0.

If the MSF or CDTF flag (register Control_2) is cleared before the end of the INT pulse,

then the INT pulse is shortened. This allows the source of a system interrupt to be cleared

immediately when it is serviced, i.e. the system does not have to wait for the completion of

the pulse before continuing; see Figure 28 and Figure 29. Instructions for clearing bit MSF

and bit CDTF can be found in Section 8.11.6.

Table 54.

INT operation (bit TI_TP = 1)

Source clock (Hz)

INT period (s)

n = 1 [1]

n > 1

4096

⁄

8192

⁄

4096

⁄

128

⁄

(1) Indicates normal duration of INT pulse.

The timing shown for clearing bit MSF is also valid for the non-pulsed interrupt mode, i.e. when

TI_TP is logic 0, where the INT pulse may be shortened by setting both bits MI and SI logic 0.

Fig 28. Example of shortening the INT pulse by clearing the MSF flag

001aaf908

seconds counter

MSF

INT

SCL

instruction

CLEAR INSTRUCTION

8th clock

(1)

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