MMA8450QT datasheet(29/57 Pages) FREESCALE

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Freescale Semiconductor

MMA8450Q

0x1C: PL_BF_ZCOMP Back/Front and Z Compensation Register

The Z-Tilt angle compensation bits allow the user to adjust the Z-lockout region from 25° up to 50°. The default Z-lockout angle

is set to the default value of 32° upon power up. The Back to Front trip angle is set by default to ±75° but this angle also can be

adjusted from a range of 65° to 80° with 5° step increments.

0x1D - 0x1F: PL_P_L_THS_REG1, 2, 3 Portrait-to-Landscape Threshold Registers

The following registers represent the Portrait-to-Landscape trip threshold registers. These registers are used to set the trip

angle for the image transition from the Portrait orientation to the Landscape orientation. The angle can be selected from Table 28

and the corresponding values for that angle should be written into the three PL_P_L_THS Registers.

Table 22. PL_COUNT Relationship with the ODR

Output Data Rate (Hz)

Step

Duration Range

400

2.5 ms

2.5 ms – 0.637s

200

5 ms

5 ms – 1.275s

100

10 ms

10 ms – 2.55s

20 ms

20 ms – 5.1s

12.5

80 ms

80 ms – 20.4s

1.56

640 ms

640 ms – 163s

0x1C: PL_BF_ZCOMP Register (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

BKFR[1]

BKFR[0]

—

ZLOCK[2]

ZLOCK[1]

ZLOCK[0]

Table 23. PL_BF_ZCOMP Description

ZLOCK

Z-Lock Angle Threshold. Range is from 25° to 50°. Step size is 3.6°.

Default value: 010

≥ 32.1°. Maximum value: 111 ≥ 50°.

BKFR

Back Front Trip Angle Threshold. Default: 10

≥ ±75°. Step size is 5°.

Range:

±(65° to 80°).

Table 24. Back/Front Orientation Definitions

BKFR

Back

→ Front Transition

Front

→ Back Transition

Z < 80° or Z > 280°

Z > 100° and Z < 260°

Z < 75° or Z > 285°

Z > 105° and Z < 255°

Z < 70° or Z > 290°

Z > 110° and Z < 250°

Z < 65° or Z > 295°

Z > 115° and Z < 245°

0x1D PL_P_L_THS_REG1 Register (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

P_L_THS[7]

P_L_THS[6]

P_L_THS[5]

P_L_THS[4]

P_L_THS[3]

P_L_THS[2]

P_L_THS[1]

P_L_THS[0]

Table 25. PL_P_L_THS_REG1 Description

P_L_THS

Portrait-to-Landscape Threshold Register 1. Default value: 30°

→ 0001_1010.

0x1E PL_P_L_THS_REG2 Register (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

P_L_THS[7]

P_L_THS[6]

P_L_THS[5]

P_L_THS[4]

P_L_THS[3]

P_L_THS[2]

P_L_THS[1]

P_L_THS[0]

Table 26. PL_P_L_THS_REG2 Description

P_L_THS

Portrait-to-Landscape Threshold Register 2. Default value: 30°

→ 0010_0010.

0x1F PL_P_L_THS_REG3 Register (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

P_L_THS[7]

P_L_THS[6]

P_L_THS[5]

P_L_THS[4]

P_L_THS[3]

P_L_THS[2]

P_L_THS[1]

P_L_THS[0]

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