PCM5310PAP datasheet(38/103 Pages) TI

38 / 103 page

TWO-WIRE INTERFACE (I

2C)

Slave Address

Packet Protocol

SDA

SCLSt

1-7

SlaveAddress

Start

Condition

Stop

Condition

R/W

ACK

DATA

1-8

ACK

DATA

ACK

R/ :Readoperationif ‘1’;otherwise,writeoperation.

ACK:Acknowledgementofabyteif ‘0’.

DATA:8bits(1byte).

PCM5310

SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com

The PCM5310 supports the I2C serial bus and the data transmission protocol for the I2C standard as a slave

device. This protocol is explained in the I2C specification 2.0.

In I2C mode, the control terminals are changed as shown in Table 23.

Table 23. Control Pins

PIN NAME

INPUT/OUTPUT

DESCRIPTION

SDA

Input/Output

I2C data

SCL

Input

I2C clock

The PCM5310 has its own 7-bit slave address, as shown in Table 24. The first six bits (MSBs) of the slave

address are factory preset to '1000110'. The last bit of the address byte is the device select bit, which can be

user-defined by the ADR terminal. A maximum of two PCM5310s can be connected on the same bus

simultaneously. Each PCM5310 responds when it receives its own slave address.

Table 24. Slave Address

MSB

LSB

R/W

The master device must control packet protocol, which consists of a start condition, a slave address with

read/write (R/W) bit, data (if write) or acknowledgement (if read), and a stop condition, as shown in Figure 45.

The PCM5310 supports only a slave receiver and slave transmitter. Table 25 shows a basic I2C write operation.

Table 26 shows a basic I2C read operation.

Figure 45. Basic I2C Framework

Table 25. Basic I2C Write Operation

TRANSMITTER

Slave

DATA TYPE

R/W

ACK

DATA

ACK

DATA

ACK

address

LEGEND: M = master device, S = slave device, St = START condition, Sp = STOP condition, R/W = read/write, ACK = acknowledge.

Table 26. Basic I2C Read Operation

TRANSMITTER

Slave

DATA TYPE

R/W

ACK

DATA

NACK

DATA

NACK

address

LEGEND: M = master device, S = slave device, St = START condition, Sp = STOP condition, R/W = read/write, ACK = acknowledge,

NACK = not acknowledge.

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