PCM5310PAP datasheet(32/103 Pages) TI

32 / 103 page

GPIO CONTROL

GPIO

Control

HP Insertion

HP Protection

Zero Flag

Logic In/Out

Connect to Port

GPIO1

GPIO2

GPIO3

GPIO2

GPIO3

GPIO1

PCM5310

SLES244 – FEBRUARY 2009 ............................................................................................................................................................................................ www.ti.com

The PCM5310 has three general-purpose input/output (GPIO) pins (pins 55, 56, and 57) that can be assigned to

various functions and internal status reads shown in Table 16, Table 17, Table 18, and Figure 39.

Table 16. GPIO Control Registers

GPIO1 select, bypass PORT-4

GBP4, GSL1[4:0]

GPIO2 select, bypass PORT-5

GBP5, GSL2[4:0]

GPIO3 select

GSL3[4:0]

Table 17. Register Data Read Through the GPIO Pins

External device control

GPO3, GPO2, GPO1

Headphone short-circuit protection status

SSHR, SSHL

Headphone insertion detect status

RHPI

Mute status for headphone

RHMUR, RHMUL

System clock fS detect for DAC12, DAC34

35, 36

RD12FS[2:0], RD34[2:0]

System clock fS detect for ADC12, ADC34

37, 38

RA12FS[2:0], RA34[2:0]

Digital mute status for DAC12 and DAC34

RDM4, RDM3, RDM2, RDM1

Digital mute status for ADC12 and ADC34

RAM4, RAM3, RAM2, RAM1

Zero crossing timeout for DAC12 and DAC34

RDZ4, RDZ3, RDZ2, RDZ1

Zero crossing timeout for ADC12 and ADC34

RAZ4, RAZ3, RAZ2, RAZ1

Zero crossing timeout for headphone

RHZR, RHZL

Table 18. Other GPIO Pin Functions

GPIO PIN FUNCTION

DESCRIPTION

Zero flag for digital input

Read the status for each DAC channel or all DAC channels

Logic

OR, AND, NOR, NAND, buffer, inverter

Audio data

Bypass audio data to PORT-4 and PORT-5 from GPIO pins

Figure 39. GPIO Control

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