DS72011RB120FPV datasheet(11/1196 Pages) RENESAS

11 / 1196 page

Rev. 2.00 Sep. 07, 2007 Page xi of xxviii

5.2.2

Types of Reset ........................................................................................................ 97

5.2.3

Power-On Reset ...................................................................................................... 98

5.2.4

Manual Reset ........................................................................................................ 100

5.3

Address Errors ................................................................................................................... 101

5.3.1

Address Error Sources .......................................................................................... 101

5.3.2

Address Error Exception Handling ....................................................................... 102

5.4

Bus Error............................................................................................................................ 102

5.4.1

Bus Error Generation Source ................................................................................ 102

5.4.2

Bus Error Exception Handling.............................................................................. 102

5.5

Register Bank Errors.......................................................................................................... 103

5.5.1

5.5.2

5.6

Interrupts............................................................................................................................ 104

5.6.1

Interrupt Sources................................................................................................... 104

5.6.2

Interrupt Priority Level ......................................................................................... 105

5.6.3

Interrupt Exception Handling ............................................................................... 106

5.7

Exceptions Triggered by Instructions ................................................................................ 107

5.7.1

Types of Exceptions Triggered by Instructions .................................................... 107

5.7.2

Trap Instructions ................................................................................................... 108

5.7.3

Slot Illegal Instructions ......................................................................................... 108

5.7.4

General Illegal Instructions................................................................................... 108

5.7.5

Integer Division Instructions................................................................................. 109

5.7.6

Floating-point Operation Instruction .................................................................... 109

5.8

When Exception Sources Are Not Accepted ..................................................................... 110

5.9

Stack Status after Exception Handling Ends...................................................................... 111

5.10

Usage Notes ....................................................................................................................... 113

5.10.1 Value of Stack Pointer (SP) .................................................................................. 113

5.10.2 Value of Vector Base Register (VBR) .................................................................. 113

5.10.3 Address Errors Caused by Stacking of Address Error Exception Handling ......... 113

Section 6 Interrupt Controller (INTC) ...............................................................115

6.1

Features.............................................................................................................................. 115

6.2

Input/Output Pins ...............................................................................................................117

6.3

Register Descriptions ......................................................................................................... 117

6.3.1

Interrupt Priority Registers 01, 02, 05 to 16 (IPR01, IPR02, IPR05 to IPR16) .... 119

6.3.2

Interrupt Control Register 0 (ICR0)...................................................................... 121

6.3.3

Interrupt Control Register 1 (ICR1)...................................................................... 122

6.3.4

Interrupt Control Register 2 (ICR2)...................................................................... 123

6.3.5

IRQ Interrupt Request Register (IRQRR)............................................................. 123

6.3.6

PINT Interrupt Enable Register (PINTER)........................................................... 125

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