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DS72011RB120FPV bảng dữ liệu(PDF) 76 Page - Renesas Technology Corp

tên linh kiện DS72011RB120FPV
Giải thích chi tiết về linh kiện  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
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Section 2 CPU
Rev. 2.00 Sep. 07, 2007 Page 48 of 1164
REJ09B0321-0200
2.4.3
Arithmetic Operation Instructions
Table 2.12
Arithmetic Operation Instructions
Compatibility
Instruction
Instruction Code
Operation
Execu-
tion
Cycles
T Bit
SH2,
SH2E SH4
SH-2A
ADD
Rm,Rn
0011nnnnmmmm1100
Rn + Rm
→ Rn
1
Yes
Yes
Yes
ADD
#imm,Rn
0111nnnniiiiiiii
Rn + imm
→ Rn
1
Yes
Yes
Yes
ADDC
Rm,Rn
0011nnnnmmmm1110
Rn + Rm + T
→ Rn, carry → T 1
Carry
Yes
Yes
Yes
ADDV
Rm,Rn
0011nnnnmmmm1111
Rn + Rm
→ Rn, overflow → T 1
Over-
flow
Yes
Yes
Yes
CMP/EQ
#imm,R0
10001000iiiiiiii
When R0 = imm, 1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/EQ
Rm,Rn
0011nnnnmmmm0000
When Rn = Rm, 1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/HS
Rm,Rn
0011nnnnmmmm0010
When Rn
≥ Rm (unsigned),
1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/GE
Rm,Rn
0011nnnnmmmm0011
When Rn
≥ Rm (signed),
1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/HI
Rm,Rn
0011nnnnmmmm0110
When Rn > Rm (unsigned),
1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/GT
Rm,Rn
0011nnnnmmmm0111
When Rn > Rm (signed),
1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/PL
Rn
0100nnnn00010101
When Rn > 0, 1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/PZ
Rn
0100nnnn00010001
When Rn
≥ 0, 1 → T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes
CMP/STR Rm,Rn
0010nnnnmmmm1100
When any bytes are equal,
1
→ T
Otherwise, 0
→ T
1
Com-
parison
result
Yes
Yes
Yes



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