HD4046212RFS datasheet(28/157 Pages) RENESAS

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HD404629R Series

Interrupt Enable Flag (IE: $000, Bit 0): Controls the entire interrupt process. It is reset by the interrupt

processing and set by the RTNI instruction, as listed in table 4.

Table 4 Interrupt Enable Flag (IE: $000, Bit 0)

Interrupt

Enabled/Disabled

Disabled

Enabled

External Interrupts (

INT

0, INT1, INT2–INT4): Five external interrupt signals.

External Interrupt Request Flags (IF0–IF4: $000, $001, $022, $023): IF0 and IF1 are set at the falling

edge of signals input to

INT

0 and INT1, and IF2–IF4 are set at the rising or falling edge of signals input to

INT

2–INT4, as listed in table 5.

The INT

2–INT4 interrupt edges are selected by the detection edge select

registers (ESR1, ESR2: $026, $027) as shown in figures 12 and 13.

Table 5 External Interrupt Request Flags (IF0–IF4: $000, $001, $022, $023)

IF0–IF4

Interrupt Request

0No

Yes

Bit

Initial value

Read/Write

Bit name

ESR13

ESR12

ESR10

ESR11

Detection edge selection register 1 (ESR1: $026)

ESR11

ESR10

INT2 detection edge

No detection

Falling-edge detection

Rising-edge detection

Double-edge detection

ESR13

ESR12

INT3 detection edge

No detection

Falling-edge detection

Rising-edge detection

Double-edge detection

Note:

Both falling and rising edges are detected.

Figure 12 Detection Edge Selection Register 1 (ESR1)

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