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HD4046212RFS bảng dữ liệu(PDF) 63 Page - Renesas Technology Corp |
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HD4046212RFS bảng dữ liệu(HTML) 63 Page - Renesas Technology Corp |
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63 / 157 page ![]() HD404629R Series 61 Bit Initial value Read/Write Bit name 3 0 W TMA3 2 0 W TMA2 0 0 W TMA0 1 0 W TMA1 Timer mode register A (TMA: $008) 0 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 X PSS PSS PSS PSS PSS PSS PSS PSS PSW PSW PSW PSW — Operating mode Timer A mode TMA3 TMA1 TMA2 TMA0 Source prescaler 2048tcyc 1024tcyc 512tcyc 128tcyc 32tcyc 8tcyc 4tcyc 2tcyc Input clock frequency 0 1 1 32tWcyc 16tWcyc 8tWcyc 2tWcyc 1/2tWcyc Time-base mode 0 0 1 1 0 1 1 — — X : Don’t care Note: 1. 2. 3. 4. tWcyc = 244.14 µs (when a 32.768-kHz crystal oscillator is used) Timer counter overflow output period (seconds) = input clock period (seconds) × 256. If PSW of TCA reset is selected while the LCD is operating, LCD operation halts (power switch goes off and all SEG and COM pins are grounded). When an LCD is connected for display, the PSW and TCA reset periods must be set in the program to the minimum. The division ratio must not be modified during time-base mode operation, otherwise an overflow cycle error will occur. Not used Reset PSW and TCA Figure 44 Timer Mode Register A (TMA) Timer B Timer B Functions: Timer B has the following functions. • Free-running/reload timer • External event counter • Timer output operation (toggle, 0, and 1 outputs) |
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