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HD4046212RFS bảng dữ liệu(PDF) 94 Page - Renesas Technology Corp |
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HD4046212RFS bảng dữ liệu(HTML) 94 Page - Renesas Technology Corp |
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94 / 157 page ![]() HD404629R Series 92 Bit Initial value Read/Write Bit name 3 — — Not used 2 — — Not used 0 0 W SMRB0 1 Undefined W SMRB1 SMRB0 0 1 Transmit clock division ratio Prescaler output divided by 2 Prescaler output divided by 4 Serial mode register B (SMRB: $028) SMRB1 0 1 Output level control in idle states Low level High level Figure 75 Serial Mode Register B (SMRB) Serial Data Register (SRL: $006, SRU: $007): This register has the following functions (figures 76 and 77). Transmission data write and shift Receive data shift and read Writing data in this register is output from the SO pin, LSB first, synchronously with the falling edge of the transmit clock; data is input, LSB first, through the SI pin at the rising edge of the transmit clock. Input/output timing is shown in figure 78. Data cannot be read or written during serial data transfer. If a read/write occurs during transfer, the accuracy of the resultant data cannot be guaranteed. Bit Initial value Read/Write Bit name 3 Undefined R/W SR3 2 Undefined R/W SR2 0 Undefined R/W SR0 1 Undefined R/W SR1 Serial data register (lower digit) (SRL: $006) Figure 76 Serial Data Register (SRL) |
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