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HD4046212RFS bảng dữ liệu(PDF) 93 Page - Renesas Technology Corp |
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HD4046212RFS bảng dữ liệu(HTML) 93 Page - Renesas Technology Corp |
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93 / 157 page ![]() HD404629R Series 91 Bit Initial value Read/Write Bit name 3 0 W SMRA3 2 0 W SMRA2 0 0 W SMRA0 1 0 W SMRA1 Serial mode register A (SMRA: $005) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 SMRA2 SMRA0 SMRA1 SMRA3 0 1 R21/SCK mode selection R21 SCK Output Output Input Clock source — — Prescaler division ratio Refer to table 29 SCK Prescaler System clock External clock Figure 74 Serial Mode Register A (SMRA) Serial Mode Register B (SMRB: $028): This register has the following functions (figure 75). Prescaler division ratio selection Output level control in idle states Serial mode register B is a 2-bit write-only register. It cannot be written during data transfer. By setting bit 0 (SMRB0) of this register, the prescaler division ratio is selected. Only bit 0 (SMRB0) can be reset to 0 by MCU reset. By setting bit 1 (SMRB1), the output level of the SO pin is controlled in idle states. The output level changes at the same time that SMRB1 is written to. |
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