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HD4046212RFS bảng dữ liệu(PDF) 103 Page - Renesas Technology Corp |
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HD4046212RFS bảng dữ liệu(HTML) 103 Page - Renesas Technology Corp |
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103 / 157 page ![]() HD404629R Series 101 System Clock Select Register (SSR: $029): Four-bit write-only register. This register must be set to the value specified in figure 91 depending on the frequency of the oscillator connected to the OSC 1 and OSC2 pins. Note that if the combination of the oscillation frequency and the value in this register is different from that specified in figure 91, the DTMF output frequencies will differ from the correct frequencies as listed in figure 89. Bit Initial value Read/Write Bit name 3 0 W SSR3 2 0 W SSR2 0 0 W SSR0 1 0 W SSR1 System clock select register (SSR: $029) SSR1 0 0 1 1 System clock selection 400 kHz 800 kHz 2 MHz 4 MHz SSR0 0 1 0 1 SSR2 0 1 ratio selection fSUB = fX/8 fSUB = fX/4 SSR3 0 1 32-kHz oscillation stop Oscillation operates in stop mode Oscillation stops in stop mode 32-kHz oscillation division Note: SSR3 is cleared only by a RESET input. SSR3 will not be cleared by a STOPC input during stop mode, and will retain its value. SSR3 will also not be cleared upon entering stop mode. Figure 91 System Clock Select Register (SSR) |
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