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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TAS2781RYYR bảng dữ liệu(PDF) 11 Page - Texas Instruments |
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TAS2781RYYR bảng dữ liệu(HTML) 11 Page - Texas Instruments |
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11 / 90 page  6.6 I2C Timing Requirements TA = 25 °C, IOVDD = 1.8 V (unless otherwise noted) MIN MAX UNIT Standard-Mode fSCL SCL clock frequency 0 100 kHz tHD;STA Hold time (repeated) START condition. After this period, the first clock pulse is generated. 4 μs tLOW LOW period of the SCL clock 4.7 μs tHIGH HIGH period of the SCL clock 4 μs tSU;STA Setup time for a repeated START condition 4.7 μs tHD;DAT Data hold time: For I2C bus devices 3.45 μs tSU;DAT Data set-up time 250 ns tr SDA and SCL rise time 1000 ns tf SDA and SCL fall time 300 ns tSU;STO Set-up time for STOP condition 4 μs tBUF Bus free time between a STOP and START condition 4.7 μs Cb Capacitive load for each bus line 400 pF Fast-Mode fSCL SCL clock frequency 0 400 kHz tHD;STA Hold time (repeated) START condition. After this period, the first clock pulse is generated. 0.6 μs tLOW LOW period of the SCL clock 1.3 μs tHIGH HIGH period of the SCL clock 0.6 μs tSU;STA Setup time for a repeated START condition 0.6 μs tHD;DAT Data hold time: For I2C bus devices 0 0.9 μs tSU;DAT Data set-up time 100 ns tr SDA and SCL rise time 20 + 0.1 × Cb[pF] 300 ns tf SDA and SCL fall time 20 + 0.1 × Cb[pF] 300 ns tSU;STO Set-up time for STOP condition 0.6 μs tBUF Bus free time between a STOP and START condition 1.3 μs Cb Capacitive load for each bus line (10pF to 400pF) 400 pF Fast-Mode Plus fSCL SCL clock frequency 1000 kHz tHD;STA Hold time (repeated) START condition. After this period, the first clock pulse is generated. 0.26 μs tLOW LOW period of the SCL clock 0.5 μs tHIGH HIGH period of the SCL clock 0.26 μs tSU;STA Setup time for a repeated START condition 0.26 μs tHD;DAT Data hold time: For I2C bus devices 0 μs tSU;DAT Data set-up time 50 ns tr SDA and SCL Rise Time 120 ns tf SDA and SCL Fall Time 120 ns tSU;STO Set-up time for STOP condition 0.26 μs tBUF Bus free time between a STOP and START condition 0.5 μs Cb Capacitive load for each bus line 550 pF www.ti.com TAS2781 SLOSE86B – JULY 2022 – REVISED JULY 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TAS2781 |
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