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MPL460AT-I/4LB bảng dữ liệu(PDF) 9 Page - Microchip Technology |
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MPL460AT-I/4LB bảng dữ liệu(HTML) 9 Page - Microchip Technology |
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9 / 48 page ![]() PL460 Signal Description Data Sheet © 2020-2023 Microchip Technology Inc. and its subsidiaries DS60001666D - 9 11. It is recommended to connect the NRST signal to a GPIO in the host controller with an internal pull-down default reset configuration to help keep PL460 in reset until the host boots. For more details, refer to Reset (NRST) Pin. 12. See Table 11-4. 13. VZC is not isolated; some isolation circuitry is required in case of using a non-isolated design. Refer to the reference design for additional information. 14. Bypass to analog ground with an external 22 nF decoupling capacitor and connect an external 10 nF decoupling capacitor between VREFP and VREFN. 15. Bypass to analog ground with an external 10 nF decoupling capacitor. 16. The STBY signal must be connected to GND if the Sleep mode functionality is not used. If using the Sleep mode functionality, the STBY signal must be connected to a GPIO in the host controller with an internal pull-down default reset configuration to avoid enabling Sleep mode until the host boots. For more details, refer to Standby (STBY) Pin. 17. See Table 11-5. |
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