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TMP93CS44 bảng dữ liệu(PDF) 108 Page - Toshiba Semiconductor |
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TMP93CS44 bảng dữ liệu(HTML) 108 Page - Toshiba Semiconductor |
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108 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-106 Timer 5 Flip-Flop Control Register 7 6 5 4 3 2 1 0 Bit symbol CAP4T6 CAP3T6 EQ7T6 EQ6T6 TFF6C1 TFF6C0 T5FFCR (0049H) Read/Write R/W W After reset 0 0 0 0 1 1 TTF6 invert trigger 0: Disable trigger 1: Enable trigger Function Invert when the UC value is loaded to CAP4 Invert when the UC value is loaded to CAP3 Invert when the UC matches TREG7 Invert when the UC matches TREG6 00: Invert TFF6 01: Set TFF6 10: Clear TFF6 11: Don’t care Always read as “11”. Figure 3.8.6 16-Bit Timer/Event Counter Related Register (4/6) Timer flip-flop 6 (TFF6) control 00 Inverts the TFF6 value (Software inversion). 01 Sets TFF6 to “1”. 10 Clear TFF6 to “0”. 11 Don’t care (Always read as “11”.) Invert when the UC matches TREG6 Timer flip-flop 6 (TFF6) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC matches TREG7 Timer flip-flop 6 (TFF6) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC value is loaded to CAP3 Timer flip-flop 6 (TFF6) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC value is loaded to CAP4 Timer flip-flop 6 (TFF6) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) |
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