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TMP93CS44 bảng dữ liệu(PDF) 29 Page - Toshiba Semiconductor

tên linh kiện TMP93CS44
Giải thích chi tiết về linh kiện  CMOS 16-Bit Microcontroller
PDF  224 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMP93CS44 bảng dữ liệu(HTML) 29 Page - Toshiba Semiconductor

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TMP93CS44/S45
2004-02-10
93CS44-27
3. IDLE1 mode
In the IDLE1 mode, only the internal oscillator operates. The system clock in
the MCU stops, the CLK pin is fixed at the level “H” in the output enable
(CKOCR<CLKEN>
= “1”).
In the halt state, and interrupt request is sampled asynchronously with the
system clock, however the halt release (Restart of operation) is performed
synchronously with it.
IDLE1 mode is released by external interrupts (NMI, INT0). (See Table 3.3.5
“Halt Releasing Source and Halt Releasing Operation”.)
When the IDLE1 mode is used, setting TRUN<PRRUN> to “0” to stop 9-bit
prescaler before “HALT” instruction reduces the power consumption.
Figure 3.3.7 illustrates the timing for releasing the halt state by interrupts in
the IDLE1 mode.
Figure 3.3.7 Timing Chart of Halt Released by Interrupts in IDLE1 Mode
Address
Data
Address
Data
IDLE1 mode
X1
CLK
A0 to A23
ALE
AD0 to AD15
RD
WR
NMI
INT0
(Level)
INT0
(Rising edge)
Address
+ 2
Address



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