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TMP93CS44 bảng dữ liệu(PDF) 5 Page - Toshiba Semiconductor

tên linh kiện TMP93CS44
Giải thích chi tiết về linh kiện  CMOS 16-Bit Microcontroller
PDF  224 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMP93CS44 bảng dữ liệu(HTML) 5 Page - Toshiba Semiconductor

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TMP93CS44/S45
2004-02-10
93CS44-3
Note: The pin state after reset.
Product
AM8/ AM16
Pin Function after Reset
TMP93CS44
“H” level
Item in parentheses ( ) are the initial setting after reset.
“H” level
Except for “*” pins, item in parentheses ( ) are the initial
setting after reset.
TMP93CS45
“L” level
Except for “*” pins, item in parentheses ( ) are the initial
setting after reset. However, port 1 is initialized item of out
parentheses.
Figure 1.1 TMP93CS44/TMP93CS45 Block Diagram
10-bit 8-ch
AD converter
Serial I/O
(Channel 0)
Serial I/O
(Channel 1)
AN0 to AN2 (P50 to P52)
AN3/ ADTRG (P53)
AN4 to AN7 (P54 to P57)
AVCC
AVSS
VREFH
VREFL
TXD0 (P60)
RXD0 (P61)
SCLK0/ CTS0 (P62)
TXD1 (P63)
RXD1 (P64)
SCLK1/ CTS1 (P65)
Port 7
WAIT
(P70)
P71
P72
P73
P74
P75
P76
P77
8-bit timer
(Timer 0)
8-bit timer
(Timer 1)
8-bit timer
(Timer 2)
8-bit timer
(Timer 3)
TO3 (P41)
16-bit timer
(Timer 4)
16-bit timer
(Timer 5)
INT4/TI4 (P42)
INT5/TI5 (P43)
TO4 (P44)
INT6/TI6 (P45)
INT7/TI7 (P46)
TO6 (P47)
W
A
BC
DE
HL
IX
IY
IZ
SP
XWA
XBC
XDE
XHL
XIX
XIY
XIZ
XSP
32-bits
F
SR
PC
2-Kbyte RAM
64-Kbyte ROM
Interrupt
controller
Watchdog
timer
Port 0
Port 1
Port 2
Port 3
Wait
controller
(3 blocks)
High-
frequency
OSC
Low-
frequency
OSC
VCC [2]
VSS [2]
X1
X2
INT0 (P35)
NMI
AD0 to AD7*
(P00 to P07)
AD8 to AD15/A8 to A15*
(P10 to P17)
A0 to A7/A16 to A23*
(P20 to P27)
RD
(P30) *
WR
(P31) *
HWR
/SCK (P32)
CLK
INT1/TI0 (P40)
Not included in the
TMP93CS45
Serial bus
interface
controller
SO/SDA (P33)
SI/SCL (P34)
XT1 (P66)
XT2 (P67)
900/L CPU
AM8/ AM16
EA
RESET
ALE
TEST1/TEST2



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