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TMP93CS44 bảng dữ liệu(PDF) 106 Page - Toshiba Semiconductor |
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TMP93CS44 bảng dữ liệu(HTML) 106 Page - Toshiba Semiconductor |
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106 / 224 page ![]() TMP93CS44/S45 2004-02-10 93CS44-104 Timer 4 Flip-Flop Control Register 7 6 5 4 3 2 1 0 Bit symbol CAP2T4 CAP1T4 EQ5T4 EQ4T4 TFF4C1 TFF4C0 T4FFCR (0039H) Read/Write R/W W After reset 0 0 0 0 1 1 TTF4 invert trigger 0: Disable trigger 1: Enable trigger Function Invert when the UC value is loaded to CAP2 Invert when the UC value is loaded to CAP1 Invert when the UC matches TREG5 Invert when the UC matches TREG4 00: Invert TFF4 01: Set TFF4 10: Clear TFF4 11: Don’t care Always read as “11”. Figure 3.8.4 16-Bit Timer/Event Counter Related Register (2/6) Timer flip-flop 4 (TFF4) control 00 Inverts the TFF4 value (Software inversion). 01 Sets TFF4 to “1”. 10 Clear TFF4 to “0”. 11 Don’t care (Always read as “11”.) Invert when the UC matches TREG4 Timer flip-flop 4 (TFF4) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC matches TREG5 Timer flip-flop 4 (TFF4) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC value is loaded to CAP1 Timer flip-flop 4 (TFF4) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) Invert when the UC value is loaded to CAP2 Timer flip-flop 4 (TFF4) invert trigger 0 Trigger disable (Invert prohibition) 1 Trigger enable (Invert permission) |
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