TMPR4938 datasheet(133/716 Pages) TOSHIBA

133 / 716 page

Chapter 7 External Bus Controller

7-23

(3) ATA

Following is a programming example to use an ATA module:

•

ISA/ATA mode (EBCCRn=11)

•

16-bit bus (EBCCRn=10)

•

READY mode (EBCCRnRDY=1, EBCCRN.PM=00)

•

Channel enable (EBCCRn.ME=1)

•

ISA/ATA pin select mode (PCFG.ISA_SEL=1, PCFG.ATA_SEL=1)

Program the number of wait cycles, the SHWT option and the bus speed according to the ISA

module used. Figure 7.3.18 shows an example of connecting a 16-bit ISA module to the TX4938.

Figure 7.3.18 An Example of Connecting an ATA Module

Since the ATA has a 16-bit data bus, the same considerations apply to the ATA module as for the

16-bit ISA module. With the EBUSC configured for a 16-bit bus, bits [3:1] of physical addresses

are driven out from ADDR[2:0]. Table 7.3.8 shows the relationships in offset addresses between

the ATA and the TX4938.

For byte accesses, the valid byte lane in the data bus differs, depending on whether the TX4938

is configured for big-endian or little-endian byte ordering. To access 8-bit registers in the ATA

address space, address conversion is required, as shown in Table 7.3.8.

Table 7.3.8 Relationships Between the ATA Addresses and Physical Addresses

TX4938 Physical Address Offset

8-Bit Access

ATA Address

Offset

ATA Register

Mnemonic

16-Bit Access

Little-Endian

Big-Endian

0x1F0

DTR (16bit)

0x103E0

0x1F1

ERR/FTR (8bit)

0x103E2

0x103E3

0x1F2

SCR (8bit)

0x103E4

0x103E5

0x1F3

SNR (8bit)

0x103E6

0x103E7

0x1F4

CLR (8bit)

0x103E8

0x103E9

0x1F5

CHR (8bit)

0x103EA

0x103EB

0x1F6

DHR (8bit)

0x103EC

0x103ED

CS[0]*

Space

0x1F7

STR/CMR (8bit)

0x103EE

0x103EF

CS[1]*

Space

0x3F6

ASR/DCR (8bit)

0x207EC

0x207ED

TX4938

ADDR[15:0]

DATA[15:0]

IOR*

IOW*

ACK*/READY

ISA-Module

SA[15:0]

SD[15:0]

IOR*

IOW*

IOCHRDY

AEN

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