TMPR4938 datasheet(130/716 Pages) TOSHIBA

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Chapter 7 External Bus Controller

7-20

7.3.9

ISA /ATA Mode

TMPR4938 supports ISA I/O space access and ATA PIO transfer mode. Since the pins used in

ISA/ATA mode are multiplexed pins, select ISA/ATA before use of these pins. Since the signal of CE*

is not used in this mode, when ETHER1 is chosen, this mode can be used by channels 5, 6 and 7. (Refer

to “5.2.3 Pin Configuration Register”.)

7.3.9.1

Address space

In the channel set to EBCCRn.ISA=01, 64 kbyte from the start address of the channel is used

for the ISA I/O space. (Refer to Figure 7.3.15). When access to the ISA I/O space is performed,

IOR* and IOW* control signals are valid, and OE*, SWE* and CE* are invalid. Other control

signals are usable, that is the same as the case other than the ISA/ATA mode.

In the channel set to EBCCRn.ISA=11, 64 kbyte from the start address of the channel is used

for ISA I/O space, and successive 128 kbyte is used for ATA space (64 kbyte each for CS[0]* and

CS[1]*). (Refer to Figure 7.3.15). When access to the ATA space is performed, the IOR*, IOW*

and CS* control signals are valid, and OE*, SWE* and CE* are invalid. Other control signals are

usable, that is the same as the case other than the ISA/ATA mode.

In general, the space from address off set 0x30000 (0x10000 in the ISA mode) to the channel

end address becomes the channel space. Access to this space is the same as the case other than the

ISA/ATA mode. (OE*, SWE* and CE* control signals are valid, and IOR*, IOW* and CS* are

invalid).

When EBCCRn.ISA is set to 01, the ATA CS[0]* and CS[1]* spaces become the normal channel space.

See Table 7.3.8 for the mapping of the ATA CS[1]* and CS[0]* register areas.

Figure 7.3.15 Physical Address Mapping of the ISA/ATA Spaces

Channel Start Address

Channel End Address

0x00000

Offset Address

0x10000

ISA Space

(64Kbyte)

ATA CS[0]* Space

(64Kbyte)

ATA CS[1]* Space

(64Kbyte)

0x20000

0x30000

CS[0]* Register Area

Normal Channel Space

CS[1]* Register Area

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