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TMPR4937 bảng dữ liệu(PDF) 333 Page - Toshiba Semiconductor

tên linh kiện TMPR4937
Giải thích chi tiết về linh kiện  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TMPR4937 bảng dữ liệu(HTML) 333 Page - Toshiba Semiconductor

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Chapter 10 PCI Controller
10-75
Bit
Mnemonic
Field Name
Description
Read/Write
2
Reserved
⎯
1
IWB
Initiator Write
Busy
Initiator Write Busy (Busy: 0x0)
Indicates that a Write cycle was in progress when a Write cycle to the PCI
Bus was executed.
While a Write cycle is in progress, no error status to that Write cycle is
reflected. Therefore, this bit is used to confirm the status when it changes
from “1” to “0” after the Write cycle ends.
1: Indicates that a Write cycle is in progress.
0: Indicates that no Write cycle is in progress.
R
0
E2PDONE
EEPROM Load
Done
EEPROM Load Done (Default--)
When using EEPROM, this bit indicates that data loading from EEPROM is
complete. This bit is set to “1” when the internal process ends even if no
EEPROM is connected.
1: Indicates that data loading from EEPROM is complete.
0: Indicates that data loading from EEPROM is not complete.
R
Figure 10.4.42 PCI Controller Status Register (2/2)



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