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RT3612EB bảng dữ liệu(PDF) 5 Page - Richtek Technology Corporation

tên linh kiện RT3612EB
Giải thích chi tiết về linh kiện  2-Phase PWM Controller with Dual Integrated Drivers for IMVP9 CPU Core Power Supply
PDF  47 Pages
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nhà sản xuất  RICHTEK [Richtek Technology Corporation]
Trang chủ  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT3612EB bảng dữ liệu(HTML) 5 Page - Richtek Technology Corporation

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RT3612EB
5
DS3612EB-02 December 2019
www.richtek.com
©
Copyright 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Operation
G-NAVPTM Control Mode
The RT3612EB adopts G-NAVPTM (Green Native AVP)
which is Richtek's proprietary topology. It is derived from
current mode constant on-time control with finite DC gain
of error amplifier and DC offset cancellation. The topology
can achieve easy loadline design and provide high DC
accuracy and fast transient response. When sensed
current signal reaches sensed voltage signal, the
RT3612EB generates a PWM pulse to achieve loop
modulation. Figure 1 shows the basic G-NAVPTM behavior
waveforms. The COMP signal is the sensed voltage, that
is inverted and amplified signal of output voltage. While
current loading is increasing, referring to Figure 1, COMP
rises due to output voltage droop. Then rising COMP
forces PWM turn on earlier and closely. While inductor
current reaches loading current, COMP enters another
steady state of higher voltage and corresponding output
voltage is in the steady state of lower voltage. The loadline,
output voltage drooping by an amount proportional to
loading current, is achieved.
SVID Interface/Control Logic/Configuration
Registers
SVID Interface receives or transmits SVID signal with CPU.
Control Logic executes command (Read/Write registers,
setVID, setPS) and sends related signals to control VR.
Configuration Registers include function setting registers
and CPU required registers.
IMON Filter
IMON Filter is used to average current signal by analog
low-pass filter. It outputs IMONAVG to the MUX of ADC for
current reporting.
MUX and ADC
The MUX supports the inputs of SET1, SET2, SET3,
TSEN, PSYS and IMONAVG. The ADC converts these
analog signals to digital codes for reporting or function
settings.
Figure 1. G-NAVPTM Behavior Waveform
Sensed Current Signal
COMP
VID
Δ
I
cc x RLL
Steady State
PWM
Load Transient
Loading Current ΔIcc
VOUT



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