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RT3612EB bảng dữ liệu(PDF) 43 Page - Richtek Technology Corporation |
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RT3612EB bảng dữ liệu(HTML) 43 Page - Richtek Technology Corporation |
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43 / 47 page ![]() RT3612EB 43 DS3612EB-02 December 2019 www.richtek.com © Copyright 2019 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Over Voltage Protection (OVP) The OVP threshold is linked with VID. The classification table and waveform are illustrated in Table 18 and Figure 29. While VID = 0V in case of VR internal setting mode or DACOFF or PS4, OVP is masked. When VID ramps up from VID = 0V till the first PWM after VID settles, OVP threshold is 2.45V to allow not-fully-discharged VSEN. Otherwise, the OVP threshold is relative to VID and equals to VID+350mV with minimum limit = 2.23V. While VID<1.88V, the OVP threshold is limited at 2.23V. The OV protection mechanism is illustrated in Figure 30. When OVP is triggered with 0.5us filter time, controller de-asserts VR_READY and forces all PWMs low to turn on low-side power MOSFETs. After 60 μs from OVP trigger, VID starts to ramp down to 0V with slow slew rate. During the period, PWMx is not allowed to turn on. Figure 29. Timing Chart for Over Voltage Threshold VID 350mV NO OVP 0V Minimum OVP= 2.23V DVID UP from VID=0V OVP threshold transition at 1st PWM after VID settles VID settle PWM OVP Threshold Table 18. Summary of Over Voltage Protection VID Condition OVP Threshold Example Protection Action Protection Reset VID = 0 (VRON = L or VR internal setting mode or DACOFF or PS4) OVP is masked VR_READY latched low. VCC/EN Toggle DVID up period from 0V to 1st PWM pulse after VID settles 2.45V DVID period from non-zero VID VID+350mV minimum threshold = 2.23V VID = 2V, OVP threshold = 2.35V VID = 1.2V, OVP threshold = 2.23V VID≠0 VID+350mV minimum threshold = 2.23V |
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