RT3612EB datasheet(29/47 Pages) RICHTEK

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RT3612EB

DS3612EB-02 December 2019

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Compensator Design

The compensator of the RT3612EB doesn't need a

complex type II or type III compensator to optimize control

loop performance. It can adopt a simple type I

compensator (one pole, one zero) in the G-NAVPTM

topology to fine tune ACLL performance. The one pole

and one zero compensator is shown in Figure 13. For

IMVP9 ACLL specification, it is recommended to adjust

compensator according to load transient ring back level.

Default compensator values are referred to design tool.

Figure 13. Type I Compensator

VID

REA1

REA2

COMP

VSEN

Differential Remote Sense Setting

The VR provides differential remote-sense inputs to

eliminate the effects of voltage drops along the PC board

traces, CPU internal power routes and socket contacts.

The CPU contains on-die sense pins, VCC_SENSE and

VSS_SENSE. The related connection is shown in Figure 14.

The VID voltage (DAC) is referred to RGND to provide

accurate voltage at remote CPU side. While CPU is not

mounted on the system, two resistors of typical 100

are required to provide output voltage feedback.

Figure 14. Remote Sensing Circuit

CPU VCC_SENSE

RGND

VID

100

CPU VSS_SENSE

COUT

REA1

CPU

100

VSEN

Switching Frequency Setting

The RT3612EB topology G-NAVPTM (Green Native AVP)

is one kind of current-mode constant on-time control. It

generates an adaptive TON (PWM) with input voltage (VIN)

for better line regulation. The TON is also adaptive to VID

voltage. For VID < 1.8V, the adaptive TON is based on

constant current ripple concept for better output voltage

ripple size control. For VID

≥ 1.8V, the adaptive TON is

based on constant frequency concept for better efficiency

performance. Figure 15 is the conceptual chart showing

the relationships between switching frequency vs. VID and

current ripple vs. VID. The RT3612EB provides a parameter

setting of kTON to design TON width. kTON is set by PIN-

SETTING of TONSET[3:0]. The related setting table is

listed in Table 9.

The equations of TON are listed as below (kTON should be

reffered to Table 9) :



ON(UG)

TON

ON(UG)

TON

ON(UG)

TON

VID 1.8V

VID

2.206

- 5ns

1.8V

0.3V VDAC < 1.8V

3.971

- 5ns

VDAC

VDAC < 0.3V

3.971

- 5ns

0.3



















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