PM7344 datasheet(165/293 Pages) PMC

165 / 293 page

PM7344 S/UNI-MPH

DATA SHEET

PMC-950449

ISSUE 6

MULTI-PHY USER NETWORK INTERFACE

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

149

Registers 042H, 142H, 242H and 342H: XIBC Control

Bit

Type

Function

Default

Bit 7

R/W

Bit 6

R/W

Bit 5

Unused

Bit 4

Unused

Bit 3

Unused

Bit 2

Unused

Bit 1

R/W

CL1

Bit 0

R/W

CL0

These registers control the transmission of T1 inband loopback activate and

deactivate codes.

EN:

The EN bit controls whether the inband code is transmitted or not. A logic 1

in the EN bit position enables transmission of inband codes; a logic 0 in the

EN bit position disables inband code transmission.

UF:

The UF bit controls whether the code is transmitted framed or unframed. A

logic 1 in the UF bit position selects unframed inband code transmission; a

logic 0 in the UF bit position selects framed inband code transmission. Note:

the UF register bit controls the T1-TRAN directly and is not qualified by the

EN bit. When UF is set to logic 1, the TRAN is disabled and no framing is

inserted regardless of the setting of EN. The UF bit should only be written to

logic 1 when the EN bit is set, and should be cleared to logic 0 when the EN

bit is cleared.

CL1, CL0:

The bit positions CL[1:0] (bits 1 & 0) of this register indicate the length of the

inband loopback code sequence, as follows:

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