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PIC18F44J10-E/ML bảng dữ liệu(PDF) 186 Page - Microchip Technology

tên linh kiện PIC18F44J10-E/ML
Giải thích chi tiết về linh kiện  28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
PDF  358 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
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PIC18F44J10-E/ML bảng dữ liệu(HTML) 186 Page - Microchip Technology

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PIC18F45J10 FAMILY
DS39682C-page 184
Preliminary
© 2007 Microchip Technology Inc.
15.4.17.3
Bus Collision During a Stop
Condition
Bus collision occurs during a Stop condition if:
a)
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out.
b)
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high.
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the
Baud
Rate
Generator
is
loaded
with
SSPxADD<6:0> and counts down to ‘0’. After the BRG
times out, SDAx is sampled. If SDAx is sampled low, a
bus collision has occurred. This is due to another
master attempting to drive a data ‘0’ (Figure 15-31). If
the SCLx pin is sampled low before SDAx is allowed to
float high, a bus collision occurs. This is another case
of another master attempting to drive a data ‘0’
(Figure 15-32).
FIGURE 15-31:
BUS COLLISION DURING A STOP CONDITION (CASE 1)
FIGURE 15-32:
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
TBRG
TBRG
SDAx asserted low
SDAx sampled
low after TBRG,
set BCLxIF
‘0’
‘0’
SDAx
SCLx
BCLxIF
PEN
P
SSPxIF
TBRG
TBRG
TBRG
Assert SDAx
SCLx goes low before SDAx goes high,
set BCLxIF
‘0’
‘0’



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