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PIC18F44J10-E/ML bảng dữ liệu(PDF) 30 Page - Microchip Technology |
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PIC18F44J10-E/ML bảng dữ liệu(HTML) 30 Page - Microchip Technology |
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30 / 358 page ![]() PIC18F45J10 FAMILY DS39682C-page 28 Preliminary © 2007 Microchip Technology Inc. REGISTER 2-2: OSCCON: OSCILLATOR CONTROL REGISTER 2.7 Effects of Power-Managed Modes on the Various Clock Sources When PRI_IDLE mode is selected, the designated pri- mary oscillator continues to run without interruption. For all other power-managed modes, the oscillator using the OSC1 pin is disabled. The OSC1 pin (and OSC2 pin if used by the oscillator) will stop oscillating. In Secondary Clock modes (SEC_RUN and SEC_IDLE), the Timer1 oscillator is operating and providing the device clock. The Timer1 oscillator may also run in all power-managed modes if required to clock Timer1 or Timer3. In RC_RUN and RC_IDLE modes, the internal oscilla- tor provides the device clock source. The 31 kHz INTRC output can be used directly to provide the clock and may be enabled to support various special features, regardless of the power-managed mode (see Section 20.2 “Watchdog Timer (WDT)” through Section 20.5 “Fail-Safe Clock Monitor” for more information on WDT, Fail-Safe Clock Monitor and Two-Speed Start-up). If the Sleep mode is selected, all clock sources are stopped. Since all the transistor switching currents have been stopped, Sleep mode achieves the lowest current consumption of the device (only leakage currents). Enabling any on-chip feature that will operate during Sleep will increase the current consumed during Sleep. The INTRC is required to support WDT operation. The Timer1 oscillator may be operating to support a real-time clock. Other features may be operating that do not require a device clock source (i.e., MSSP slave, PSP, INTn pins and others). Peripherals that may add significant current consumption are listed in Section 23.2 “DC Characteristics: Power-Down and Supply Current”. R/W-0 U-0 U-0 U-0 R-q(1) U-0 R/W-0 R/W-0 IDLEN — — —OSTS — SCS1 SCS0 bit 7 bit 0 bit 7 IDLEN: Idle Enable bit 1 = Device enters Idle mode on SLEEP instruction 0 = Device enters Sleep mode on SLEEP instruction bit 6-4 Unimplemented: Read as ‘0’ bit 3 OSTS: Oscillator Start-up Time-out Status bit(1) 1 = Oscillator Start-up Timer time-out has expired; primary oscillator is running 0 = Oscillator Start-up Timer time-out is running; primary oscillator is not ready Note 1: The Reset value is ‘0’ when HS mode and Two-Speed Start-up are both enabled; otherwise, it is ‘1’. bit 2 Unimplemented: Read as ‘0’ bit 1-0 SCS1:SCS0: System Clock Select bits 11 = Internal oscillator 10 = Primary oscillator 01 = Timer1 oscillator When FOSC2 = 1: 00 = Primary oscillator When FOSC2 = 0: 00 = Internal oscillator Legend: U = Unimplemented, read as ‘0’ ‘q’ = Value determined by configuration -n = Value at POR R = Readable bit ‘0’ = Bit is cleared W = Writable bit |
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