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PIC18F44J10-E/ML bảng dữ liệu(PDF) 46 Page - Microchip Technology |
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PIC18F44J10-E/ML bảng dữ liệu(HTML) 46 Page - Microchip Technology |
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46 / 358 page  PIC18F45J10 FAMILY DS39682C-page 44 Preliminary © 2007 Microchip Technology Inc. INDF2 PIC18F2XJ10 PIC18F4XJ10 N/A N/A N/A POSTINC2 PIC18F2XJ10 PIC18F4XJ10 N/A N/A N/A POSTDEC2 PIC18F2XJ10 PIC18F4XJ10 N/A N/A N/A PREINC2 PIC18F2XJ10 PIC18F4XJ10 N/A N/A N/A PLUSW2 PIC18F2XJ10 PIC18F4XJ10 N/A N/A N/A FSR2H PIC18F2XJ10 PIC18F4XJ10 ---- xxxx ---- uuuu ---- uuuu FSR2L PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu STATUS PIC18F2XJ10 PIC18F4XJ10 ---x xxxx ---u uuuu ---u uuuu TMR0H PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu TMR0L PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu T0CON PIC18F2XJ10 PIC18F4XJ10 1111 1111 1111 1111 uuuu uuuu OSCCON PIC18F2XJ10 PIC18F4XJ10 0--- q-00 0--- q-00 u--- q-uu WDTCON PIC18F2XJ10 PIC18F4XJ10 ---- ---0 ---- ---0 ---- ---u RCON(4) PIC18F2XJ10 PIC18F4XJ10 0--1 11q0 0--q qquu u--u qquu TMR1H PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu TMR1L PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu T1CON PIC18F2XJ10 PIC18F4XJ10 0000 0000 u0uu uuuu uuuu uuuu TMR2 PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu PR2 PIC18F2XJ10 PIC18F4XJ10 1111 1111 1111 1111 1111 1111 T2CON PIC18F2XJ10 PIC18F4XJ10 -000 0000 -000 0000 -uuu uuuu SSP1BUF PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu SSP1ADD PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu SSP1STAT PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu SSP1CON1 PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu SSP1CON2 PIC18F2XJ10 PIC18F4XJ10 0000 0000 0000 0000 uuuu uuuu ADRESH PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu ADRESL PIC18F2XJ10 PIC18F4XJ10 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 PIC18F2XJ10 PIC18F4XJ10 0-00 0000 0-00 0000 u-uu uuuu ADCON1 PIC18F2XJ10 PIC18F4XJ10 --00 0qqq --00 0qqq --uu uqqq ADCON2 PIC18F2XJ10 PIC18F4XJ10 0-00 0000 0-00 0000 u-uu uuuu TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 4: See Table 4-1 for Reset value for specific condition. |
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