PIC18F44J10-ESLASHML datasheet(62/358 Pages) MICROCHIP

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PIC18F45J10 FAMILY

DS39682C-page 60

Preliminary

5.3.5

STATUS REGISTER

The STATUS register, shown in Register 5-2, contains

the arithmetic status of the ALU. As with any other SFR,

it can be the operand for any instruction.

If the STATUS register is the destination for an instruc-

tion that affects the Z, DC, C, OV or N bits, the results

of the instruction are not written; instead, the STATUS

performed. Therefore, the result of an instruction with

the STATUS register as its destination may be different

than intended. As an example, CLRF STATUS will set

the Z bit and leave the remaining status bits unchanged

(‘000u u1uu’).

It is recommended that only BCF, BSF, SWAPF, MOVFF

and MOVWF instructions are used to alter the STATUS

C, DC, OV or N bits in the STATUS register.

For other instructions that do not affect Status bits, see

the instruction set summaries in Table 21-2 and

Table 21-3.

STATUS REGISTER

Note:

The C and DC bits operate as the borrow

and digit borrow bits, respectively, in

subtraction.

U-0

R/W-x

—

—N

bit 7

bit 0

bit 7-5

Unimplemented: Read as ‘0’

bit 4

N: Negative bit

This bit is used for signed arithmetic (2’s complement). It indicates whether the result was

negative (ALU MSB = 1).

= Result was negative

= Result was positive

bit 3

OV: Overflow bit

This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit

magnitude which causes the sign bit (bit 7 of the result) to change state.

= Overflow occurred for signed arithmetic (in this arithmetic operation)

= No overflow occurred

bit 2

Z: Zero bit

= The result of an arithmetic or logic operation is zero

= The result of an arithmetic or logic operation is not zero

bit 1

DC: Digit Carry/borrow bit

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

= A carry-out from the 4th low-order bit of the result occurred

= No carry-out from the 4th low-order bit of the result

Note:

For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s

complement of the second operand. For rotate (RRF, RLF) instructions, this bit is

loaded with either bit 4 or bit 3 of the source register.

bit 0

C: Carry/borrow bit

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

= A carry-out from the Most Significant bit of the result occurred

= No carry-out from the Most Significant bit of the result occurred

Note:

For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s

complement of the second operand. For rotate (RRF, RLF) instructions, this bit is

loaded with either the high or low-order bit of the source register.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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