XRT79L71IB datasheet(79/109 Pages) EXAR

79 / 109 page

XRT79L71

REV. 1.0.0

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - HARDWARE

General Flow of XRT79L71 ATM UNI/PPP/Clear-Channel DS3/E3 Framer Device Interrupt Servicing

Whenever any of the conditions, presented in Table 4 occur (if their Interrupt is enabled), then the XRT79L71

will generate an interrupt request to the µC/µP by asserting the active-low interrupt request output pin, INT*.

Shortly after the µC/µP has detected the activated INT* signal, it will enter into the appropriate user-supplied

interrupt service routine. The first task, for the µC/µP, while running this interrupt service routine, may be to

isolate the source of the interrupt request down to the device level (e.g., the XRT79L71 ATM UNI/PPP/Clear-

Channel DS3/E3 Framer device), if multiple peripheral devices exist in the user's system.

However, once the interrupting peripheral device has been identified and determined to be the XRT79L71, the

next task for the µC/µP is to identify the functional block (within the XRT79L71) that requested the interrupt.

Finally, the µC/µP will need to proceed further and identify the exact condition(s) causing the interrupt to be

generated by the XRT79L71.

The procedure for servicing the XRT79L71 Interrupts is best achieved by executing the following steps.

STEP 1 - Determine the Functional Block(s) requesting the Interrupt

Framer Block Interrupt Status Register

0x1105

RxDS3 Interrupt Enable RegisterRxE3 Interrupt Enable Register # 1 - ITU-T G.751RxE3 Inter-

rupt Enable Register # 1 - ITU-T G.832

0x1112

RxDS3 Interrupt Status RegisterRxE3 Interrupt Enable Register # 2 - ITU-T G.751RxE3 Inter-

rupt Enable Register # 2 - ITU-T G.832

0x1113

RxE3 Interrupt Status Register # 1 - ITU-T G.751RxE3 Interrupt Status Register # 1 - ITU-T

G.832

0x1114

RxE3 Interrupt Status Register # 2 - ITU-T G.751RxE3 Interrupt Status Register # 2 - ITU-T

G.832

0x1115

RxDS3 FEAC Interrupt Enable/Status Register

0x1117

RxDS3/E3 LAPD Control Register

0x1118

TxDS3 FEAC Configuration & Status Register

0x1131

TxDS3/E3 LAPD Status/Interrupt Register

0x1134

RxPLCP Interrupt Enable Register

0x1191

RxPLCP Interrupt Status Register

0x1192

LIU Interrupt Enable Register

0x1301

LIU Interrupt Status Register

0x1302

Receive ATM Cell Processor Block - Receive ATM Interrupt Status Register - Byte 1

0x170A

Receive ATM Cell Processor Block - Receive ATM Interrupt Status Register - Byte 0

0x170B

Receive ATM Cell Processor Block - Receive ATM Interrupt Enable Register - Byte 1

0x170E

Receive ATM Cell Processor Block - Receive ATM Interrupt Enable Register - Byte 0

0x170F

Transmit ATM Cell Processor Block - Transmit ATM Interrupt Status Register

0x1F0B

Transmit ATM Cell Processor Block - Transmit ATM Interrupt Enable Register

0x1F0F

TABLE 4: A LISTING OF THE XRT79L71 ATM UNI/PPP/CLEAR-CHANNEL DS3/E3 FRAMER DEVICE INTERRUPT

BLOCK REGISTERS

ADDRESS LOCATION

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