MC68HC908GR4MP datasheet(124/286 Pages) FREESCALE

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Keyboard Interrupt (KBI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

124

Freescale Semiconductor

To allow software to clear the keyboard interrupt latch during a break interrupt, write a 1 to the BCFE bit.

If a latch is cleared during the break state, it remains cleared when the MCU exits the break state.

To protect the latch during the break state, write a logic 0 to the BCFE bit. With BCFE at logic 0 (its default

state), writing to the keyboard acknowledge bit (ACKK) in the keyboard status and control register during

the break state has no effect. See 13.7.1 Keyboard Status and Control Register.

13.7 I/O Registers

These registers control and monitor operation of the keyboard module:

•

Keyboard status and control register (INTKBSCR)

•

Keyboard interrupt enable register (INTKBIER)

13.7.1 Keyboard Status and Control Register

The keyboard status and control register:

•

Flags keyboard interrupt requests

•

Acknowledges keyboard interrupt requests

•

Masks keyboard interrupt requests

•

Controls keyboard interrupt triggering sensitivity

Bits 7–4 — Not used

These read-only bits always read as logic 0s.

KEYF — Keyboard Flag Bit

This read-only bit is set when a keyboard interrupt is pending. Reset clears the KEYF bit.

1 = Keyboard interrupt pending

0 = No keyboard interrupt pending

ACKK — Keyboard Acknowledge Bit

Writing a 1 to this write-only bit clears the keyboard interrupt request. ACKK always reads as logic 0.

Reset clears ACKK.

IMASKK — Keyboard Interrupt Mask Bit

Writing a 1 to this read/write bit prevents the output of the keyboard interrupt mask from generating

interrupt requests. Reset clears the IMASKK bit.

1 = Keyboard interrupt requests masked

0 = Keyboard interrupt requests not masked

Address: $001A

Bit 7

654321

Bit 0

Read:

0000

KEYF

IMASKK

MODEK

Write:

ACKK

Reset:

00000000

= Unimplemented

Figure 13-3. Keyboard Status and Control Register (INTKBSCR)

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