MC68HC908GR4MP datasheet(122/286 Pages) FREESCALE

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Keyboard Interrupt (KBI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

122

Freescale Semiconductor

A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK

bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.

•

If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an

interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on

one pin because another pin is still low, software can disable the latter pin while it is low.

•

If the keyboard interrupt is falling-edge and low-level sensitive, an interrupt request is present as

long as any keyboard interrupt pin is low and the pin is keyboard interrupt enabled.

If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low-level sensitive, and both

of the following actions must occur to clear a keyboard interrupt request:

•

Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear

the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the

ACKK bit in the keyboard status and control register (INTKBSCR). The ACKK bit is useful in

applications that poll the keyboard interrupt pins and require software to clear the keyboard

interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also

prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on

the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another

interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program

counter with the vector address at locations $FFE0 and $FFE1.

•

Return of all enabled keyboard interrupt pins to a high level — As long as any enabled keyboard

interrupt pin is low, the keyboard interrupt remains set.

The vector fetch or software clear and the return of all enabled keyboard interrupt pins to a high level may

occur in any order.

If the MODEK bit is clear, the keyboard interrupt pin is falling-edge-sensitive only. With MODEK clear, a

vector fetch or software clear immediately clears the keyboard interrupt request.

Reset clears the keyboard interrupt request and the MODEK bit, clearing the interrupt request even if a

keyboard interrupt pin stays low.

The keyboard flag bit (KEYF) in the keyboard status and control register can be used to see if a pending

interrupt exists. The KEYF bit is not affected by the keyboard interrupt mask bit (IMASKK) which makes

it useful in applications where polling is preferred.

Addr.

Bit 7

654321

Bit 0

$001A

Keyboard Status

and Control Register

(INTKBSCR)

Read:

0000

KEYF

IMASKK

MODEK

Write:

ACKK

Reset:

00000000

$001B

Keyboard Interrupt Enable

Read:

0000

KBIE3

KBIE2

KBIE1

KBIE0

Write:

Reset:

0000

= Unimplemented

Figure 13-2. I/O Register Summary

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