MC68HC908GR4MP datasheet(241/286 Pages) FREESCALE

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I/O Registers

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

241

22.9.3 TIM Counter Modulo Registers

The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter

reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting

from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow

interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.

NOTE

Reset the TIM counter before writing to the TIM counter modulo registers.

22.9.4 TIM Channel Status and Control Registers

Each of the TIM channel status and control registers:

•

Flags input captures and output compares

•

Enables input capture and output compare interrupts

•

Selects input capture, output compare, or PWM operation

•

Selects high, low, or toggling output on output compare

•

Selects rising edge, falling edge, or any edge as the active input capture trigger

•

Selects output toggling on TIM overflow

•

Selects 0% and 100% PWM duty cycle

•

Selects buffered or unbuffered output compare/PWM operation

Address:

T1MODH, $0023 and T2MODH, $002E

Bit 7

654321

Bit 0

Read:

Bit 15

Bit 8

Write:

Reset:

11111111

Figure 22-7. TIM Counter Modulo Register High (TMODH)

Address:

T1MODL, $0024 and T2MODL, $002F

Bit 7

654321

Bit 0

Read:

Bit 15

Bit 8

Write:

Reset:

11111111

Figure 22-8. TIM Counter Modulo Register Low (TMODL)

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