WM8510GEDSSLASHV datasheet(64/81 Pages) WOLFSON

64 / 81 page

WM8510

Production Data

PD Rev 4.1 December 2006

Notes:

1. Default values of N/A indicate non-latched data bits (e.g. software reset or volume update bits).

2. Register bits marked as "Reserved" should not be changed from the default.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

0 (00h)

[8:0]

RESET

N/A

Software reset

Resetting the

Chip

BUFDCOPEN

Dedicated buffer for DC level shifting output stages

when in 1.5x gain boost configuration.

0=Buffer disabled

1=Buffer enabled (required for 1.5x gain boost)

Analogue

Outputs

Reserved

MIC2EN

MIC2 input buffer enable

0 = OFF

1 = ON

MIC Inputs

PLLEN

PLL enable

0=PLL off

1=PLL on

Master Clock

and Phase

Locked Loop

(PLL)

MICBEN

Microphone Bias Enable

0 = OFF (high impedance output)

1 = ON

Microphone

Biasing Circuit

BIASEN

Analogue amplifier bias control

0=Disabled

1=Enabled

Power

Management

BUFIOEN

Unused input/output tie off buffer enable

0=Disabled

1=Enabled

Enabling the

Outputs

1 (01h)

1:0

VMIDSEL

Reference string impedance to VMID pin:

00=off (open circuit)

01=75kΩ

10=300kΩ

11=2.5kΩ

Power

Management

8:5

0000

Reserved

BOOSTEN

Input BOOST enable

0 = Boost stage OFF

1 = Boost stage ON

Input Boost

Reserved

INPPGAEN

Input microphone PGA enable

0 = disabled

1 = enabled

Input Signal

Path

Reserved

2 (02h)

ADCEN

ADC Enable Control

0 = ADC disabled

1 = ADC enabled

Analogue to

Digital Converter

(ADC)

Reserved

MONOEN

MONOOUT enable

0 = disabled

1 = enabled

Analogue

Outputs

3 (03h)

SPKNEN

SPKOUTN enable

0 = disabled

1 = enabled

Analogue

Outputs

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