WM8510GEDSSLASHV datasheet(55/81 Pages) WOLFSON

55 / 81 page

Pre-Production

WM8510

PD Rev 4.1 December 2006

GENERAL PURPOSE INPUT/OUTPUT

The CSB/GPIO pin can be configured to perform a variety of useful tasks by setting the GPIOSEL

Note that SLOWCLKEN must be enabled when using the Jack Detect function

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

2:0

GPIOSEL

000

CSB/GPIO pin function select:

000=CSB input

001= Jack insert detect

010=Temp ok

011=Amute active

100=PLL clk o/p

101=PLL lock

110=Reserved

111=Reserved

GPIOPOL

GPIO Polarity invert

0=Non inverted

1=Inverted

GPIO

control

5:4

OPCLKDIV

PLL Output clock division ratio

00=divide by 1

01=divide by 2

10=divide by 3

11=divide by 4

Table 49 CSB/GPIO Control

CONTROL INTERFACE

SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS

The control interface can operate as either a 3-wire or 2-wire MPU interface. The MODE pin

determines the 2 or 3 wire mode as shown in Table 50.

The WM8510 is controlled by writing to registers through a serial control interface. A control word

consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which control register is

accessed. The remaining 9 bits (B8 to B0) are register bits, corresponding to the 9 bits in each

control register.

MODE

INTERFACE FORMAT

Low

2 wire

High

3 wire

Table 50 Control Interface Mode Selection

3-WIRE SERIAL CONTROL MODE

In 3-wire mode, every rising edge of SCLK clocks in one data bit from the SDIN pin. A rising edge on

CSB/GPIO latches in a complete control word consisting of the last 16 bits.

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