TUSB2E11 datasheet(36/58 Pages) TI1

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Table 11-7. U_RX_ADJUST_PORT1 Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

Reserved

RH/W

Reserved

RH/W

Reserved

2-0

U_EQ_P1

RH/W

0h = 0.06 dB (typical) (B0 OTP default)

1h = 0.58 dB (typical)

2h = 1.09 dB (typical) (B1 OTP default)

3h = 1.56 dB (typical)

4h = 2.26 dB (typical)

5h = 2.67 dB (typical)

6h = 3.03 dB (typical)

7h = 3.35 dB (typical)

11.1.6 U_DISCONNECT_SQUELCH_PORT1 Register (Offset = 73h) [Reset = 83h]

U_DISCONNECT_SQUELCH_PORT1 is shown in Table 11-8.

Return to the Summary Table.

Hardware default value can be overridden through factory programmable OTP for this register.

Table 11-8. U_DISCONNECT_SQUELCH_PORT1 Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

U_DISCONNECT_THRES

HOLD_P1

RH/W

0h = 525 mV (minimum), 0% (B0 OTP default)

1h = 545 mV (minimum), +4%

2h = 565 mV (minimum), +8%

3h = 585 mV (minimum), +11%

4h = 605 mV (minimum), +15%

5h = 625 mV (minimum), +19%

6h = 645 mV (minimum), +23%

7h = 665 mV (minimum), +27%

8h = 685 mV (minimum) (B1 OTP default), +31%

9h = 705 mV (minimum), +34%

Ah = 725 mV (minimum), +38%

Bh = 745 mV (minimum), +42%

Ch = 765 mV (minimum), +46%

Dh = 785 mV (minimum), +50%

Eh = 805 mV (minimum), +53%

Fh = 825 mV (minimum), +57%

Reserved

RH/W

Reserved

2-0

U_SQUELCH_THRESHO

LD_P1

RH/W

0h = 130 mV (minimum), +30%

1h = 124 mV (minimum), +24%

2h = 117 mV (minimum), +17%

3h = 111 mV (minimum), +11% (B1 OTP default)

4h = 104 mV (minimum), +4% (B0 OTP default)

5h = 98 mV (minimum), −2%

6h = 91 mV (minimum), −9%

7h = 85 mV (minimum), −15%

11.1.7 E_HS_TX_PRE_EMPHASIS_P1 Register (Offset = 77h) [Reset = 0h]

E_HS_TX_PRE_EMPHASIS_P1 is shown in Table 11-9.

Return to the Summary Table.

Hardware default value can be overridden through factory programmable OTP for this register.

TUSB2E11

SLLSFI4B – NOVEMBER 2021 – REVISED AUGUST 2023

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