HC08KL8GRSSLASHD datasheet(97/256 Pages) NXP

97 / 256 page

System Integration Module (SIM)

Low-Power Modes

MC68HC08KL8 — Rev. 2.0

General Release Specification

System Integration Module (SIM)

Figure 8-15 and Figure 8-16 show the timing for WAIT recovery.

Figure 8-15. Wait Recovery from Interrupt or Break

Figure 8-16. Wait Recovery from Internal Reset

8.7.2 Stop Mode

In stop mode, the SIM counter is reset and the system clocks are

disabled. An interrupt request from a module can cause an exit from stop

mode. Stacking for interrupts begins after the selected stop recovery

time has elapsed. Reset or break also causes an exit from stop mode.

The SIM disables the oscillator signals (CGMOUT and CGMXCLK) in

stop mode, stopping the CPU and peripherals. Stop recovery time is

selectable using the SSREC bit in the mask option register. If SSREC is

set, stop recovery is reduced from the normal delay of 4096 CGMXCLK

cycles down to 32. This is ideal for applications using canned oscillators

that do not require long startup times from stop mode.

$6E0C

$6E0B

$00FF

$00FE

$00FD

$00FC

$A6

$01

$0B

$6E

$A6

IAB

IDB

EXITSTOPWAIT

NOTE: EXITSTOPWAIT = RST pin or CPU interrupt or break interrupt

IAB

IDB

RST

$A6

$6E0B

RSTVCTH

RSTVCTL

$A6

CGMXCLK

CYCLES

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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