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NRF9160-SICA-R7 bảng dữ liệu(PDF) 336 Page - Nordic Semiconductor

tên linh kiện NRF9160-SICA-R7
Giải thích chi tiết về linh kiện  nRF9160 Product Specification
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nhà sản xuất  NORDIC [Nordic Semiconductor]
Trang chủ  https://www.nordicsemi.com/
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NRF9160-SICA-R7 bảng dữ liệu(HTML) 336 Page - Nordic Semiconductor

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Peripherals
6.19.8 Pin configuration
The different signals RXD, CTS (Clear To Send, active low), RTS (Request To Send, active low), and TXD
associated with the UARTE are mapped to physical pins according to the configuration specified in the
PSEL.RXD, PSEL.CTS, PSEL.RTS, and PSEL.TXD registers respectively.
The PSEL.RXD, PSEL.CTS, PSEL.RTS, and PSEL.TXD registers and their configurations are only used as long
as the UARTE is enabled, and retained only for the duration the device is in ON mode. PSEL.RXD, PSEL.RTS,
PSEL.RTS, and PSEL.TXD must only be configured when the UARTE is disabled.
To secure correct signal levels on the pins by the UARTE when the system is in OFF mode, the pins must be
configured in the GPIO peripheral as described in the following table.
Only one peripheral can be assigned to drive a particular GPIO pin at a time. Failing to do so may result in
unpredictable behavior.
UARTE signal
UARTE pin
Direction
Output value
RXD
As specified in PSEL.RXD
Input
Not applicable
CTS
As specified in PSEL.CTS
Input
Not applicable
RTS
As specified in PSEL.RTS
Output
1
TXD
As specified in PSEL.TXD
Output
1
Table 98: GPIO configuration before enabling peripheral
6.19.9 Registers
Base address Peripheral
Instance
Secure mapping
DMA security
Description
Configuration
0x50008000
0x40008000
UARTE
UARTE0 : S
UARTE0 : NS
US
SA
Universal asynchronous
receiver/transmitter with
EasyDMA 0
0x50009000
0x40009000
UARTE
UARTE1 : S
UARTE1 : NS
US
SA
Universal asynchronous
receiver/transmitter with
EasyDMA 1
0x5000A000
0x4000A000
UARTE
UARTE2 : S
UARTE2 : NS
US
SA
Universal asynchronous
receiver/transmitter with
EasyDMA 2
0x5000B000
0x4000B000
UARTE
UARTE3 : S
UARTE3 : NS
US
SA
Universal asynchronous
receiver/transmitter with
EasyDMA 3
Table 99: Instances
Register
Offset
Security Description
TASKS_STARTRX
0x000
Start UART receiver
TASKS_STOPRX
0x004
Stop UART receiver
TASKS_STARTTX
0x008
Start UART transmitter
TASKS_STOPTX
0x00C
Stop UART transmitter
TASKS_FLUSHRX
0x02C
Flush RX FIFO into RX buffer
SUBSCRIBE_STARTRX
0x080
Subscribe configuration for task STARTRX
SUBSCRIBE_STOPRX
0x084
Subscribe configuration for task STOPRX
SUBSCRIBE_STARTTX
0x088
Subscribe configuration for task STARTTX
SUBSCRIBE_STOPTX
0x08C
Subscribe configuration for task STOPTX
SUBSCRIBE_FLUSHRX
0x0AC
Subscribe configuration for task FLUSHRX
EVENTS_CTS
0x100
CTS is activated (set low). Clear To Send.
EVENTS_NCTS
0x104
CTS is deactivated (set high). Not Clear To Send.
4418_1315 v2.0
336



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