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SPC572LX bảng dữ liệu(PDF) 11 Page - STMicroelectronics |
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SPC572LX bảng dữ liệu(HTML) 11 Page - STMicroelectronics |
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11 / 112 page ![]() DocID027866 Rev 5 11/112 SPC572Lx Introduction 111 1.5 Features overview On-chip modules within SPC572Lx include the following features: • 1 main CPU, single issue, 32-bit CPU core complex (e200z2) – Power Architecture embedded specification compliance – Instruction set enhancement allowing variable length encoding (VLE), encoding a mix of 16-bit and 32-bit instructions, for code size footprint reduction – Single-precision floating point operations – Saturation Instructions Extension adding scalar saturating arithmetic support to the PowerISA Integer Saturation (ISAT) • 1568 KB (1536 KB code flash + 32 KB data flash) on-chip flash memory – Supporting multiple blocks allowing EEPROM emulation – RWW between data EEPROM and code flash memory • 64 KB general-purpose data SRAM • System Memory Protection Unit (SMPU) • 16-channel Direct Memory Access controllers (eDMA) with two channel multiplexers for up to 60 DMA sources • Interrupt Controller (INTC) supporting up to 1024 interrupt sources (all are not assigned) • System Timer Module (STM) • 2 Software Watchdog Timers (SWT) • 2 Periodic Interrupt Timers (PIT) – 1 PIT with four standard 32-bit timer channels – 1 PIT with two 32-bit timer channels which can be combined into one 64-bit channel • Single phase-locked loop with stable clock domain for peripherals and core (PLL) • Single crossbar switch architecture for concurrent access to peripherals, flash memory, or SRAM from multiple bus masters • System Integration Unit Lite (SIUL2) • Boot Assist Flash (BAF) supports factory programming using a serial bootload through the UART Serial Boot Mode Protocol (physical interface (PHY) can be e.g., UART and CAN) • PASS module (supporting 256-bit JTAG password protection) • Device life cycle monitoring • Generic Timer Module (GTM101) • Enhanced analog-to-digital converter system with: – Three 12-bit SAR analog converters – One 16-bit Sigma-Delta analog converter • Decimation unit to support SD ADC data conditioning • 1 Deserial Serial Peripheral Interface (DSPI) module • 2 LIN and UART communication interfaces (LINFlexD) modules • 1 microsecond-bus channel (composed of one DSPI and one LINFlexD) • 4 SENT (Single Edge Nibble Transmission) channels • 2 Modular Controller Area Network (M_CAN) modules |
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