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SPC572LX bảng dữ liệu(PDF) 63 Page - STMicroelectronics |
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SPC572LX bảng dữ liệu(HTML) 63 Page - STMicroelectronics |
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63 / 112 page ![]() DocID027866 Rev 5 63/112 SPC572Lx Electrical characteristics 111 3.15.1 Power management integration Refer to the integration scheme provided below to ensure correct functionality of the device. Figure 18. Voltage regulator capacitance connection The internal voltage regulator requires external capacitance (CREGn) to be connected to the device in order to provide a stable low voltage digital supply to the device. Capacitances should be placed on the board as near as possible to the associated pins. Care should also be taken to limit the serial inductance of the board to less than 5 nH. A decoupling capacitor must be placed between each VDD_LV supply pin and VSS ground plane to ensure stable voltage. The capacitor should be placed as near as possible to the VDD_LV supply pin. 3.15.2 Main voltage regulator electrical characteristics The device implements an internal voltage regulator to generate the low voltage core supply VDD_LV from the high voltage ballast supply VDD_BV_PMC. The regulator itself is supplied by VDD_HV_PMC. Note: Both HV supplies, VDD_HV_PMC and VDD_BV_PMC, are shorted with VDD_HV_IO supply at package level. DEVICE VSS VDD_HV_IO VDD_LV CDECHV VSS VDD_LV VDD_LV CDECREG2 DEVICE VDD_HV_IO_MAIN I VDD_LVn VREF VDD_HV_PMC Voltage VSS VSS VSS VDD_LV (LV_COR) CREG (LV_COR) VDD_HV_PMC CDECBV (regulator supply decoupling) (regulator supply decoupling) Regulator VSS VSS |
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