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ECE1200 bảng dữ liệu(PDF) 16 Page - Microchip Technology |
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ECE1200 bảng dữ liệu(HTML) 16 Page - Microchip Technology |
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16 / 87 page ![]() ECE1200 DS00003093C Draft-page 16 2018-2021 Microchip Technology Inc. 3.0 POWER, CLOCKS, AND RESETS 3.1 Introduction This Power, Clocks, and Resets (PCR) chapter identifies all the power supplies, clock sources, and reset inputs to the chip and defines all the derived power, clock, and reset signals. In addition, this section identifies Power, Clock, and Reset events that may be used to generate an interrupt event, as well as, the Chip Power Management Features. 3.2 References No references have been cited for this chapter. 3.3 Interrupts The Power, Clocks, and Resets logic generates no interrupt events to the Host system. 3.4 Power 3.4.1 POWER SOURCES Table 3-1 lists the pins from which the ECE1200 draws current. These current values are defined in Section 8.3, "Power Consumption," on page 63. Timing sequences between these power rails are given in Section 9.5.1, "VTR Sequencing and RESETI# Timing," on page 70. TABLE 3-1: POWER SOURCE DEFINITIONS Power Well Nominal Voltage Description Source VTR_33 3.3V 3.3V I/O Power Supply This supply is used to power the 3.3V I/O pins. It is to be connected to the “Always-on” / “Suspend” / ”S5” supply rails in system. There is no need to connect it to a deeper power well, such as the Deep Sleep Well, even if that is what powers the downstream LPC device(s). This supply must be on prior to the RESETI# sig- nal being deasserted (system RSMRST#). Pin Interface VTR_18 1.8V 1.8V I/O Power Supply This supply is used to power the 1.8V I/O pins. It is to be connected to the 1.8V “Always-on” / “Suspend” / ”S5” supply rails in system. There is no need to connect it to a deeper power well, such as the Deep Sleep Well, even if that is what powers the downstream LPC device(s). This supply must be on prior to the RESETI# sig- nal being deasserted (system RSMRST#). Pin Interface |
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