ECE1200 datasheet(45/87 Pages) MICROCHIP

tên linh kiện	ECE1200

Giải thích chi tiết về linh kiện	eSPI to LPC Bridge

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 2018-2021 Microchip Technology Inc.

DS00003093C Draft-page 45

ECE1200

6.9.19

POWER SAVE REGISTER

Index

2Ah

Bits

Description

Type

Default

Reset Event

7 OSC_LOCKED

‘1’ in this bit indicates that the on-chip oscillator is locked to the

32KHz SUSCLK input.

PLTRST

6 FORCE_OSC_LOCK

Writing ‘1’ into this bit forces the oscillator output to be used for

all activity regardless of whether it is locked. The LPC clocks

will be slower than specified if not locked.

R/W

PLTRST

5 Reserved

4 Reserved

3 Reserved

2 Reserved

1 IDLE_GATEOSC

A ‘1’ written into this bit will save power by gating off internal

clocking to some chip functions whenever they are idle.

R/W

PLTRST

0 VW_C10_STOPOSC

Connected Standby support to save internal power.

A ‘1’ written into this bit will enable Deep Sleep Mode to be

entered whenever the HOST_C10 Virtual Wire is high while all

the device interfaces (eSPI, LPC, SERIRQ and LPC Clocks)

are already idle. In Deep Sleep Mode the internal oscillator is

turned off.

R/W

PLTRST

ECE1200 bảng dữ liệu(PDF) 45 Page - Microchip Technology