MCP3464T-ESLASHST datasheet(56/108 Pages) MICROCHIP

56 / 108 page

MCP3461/2/4

DS20006180D-page 56

 2019-2021 Microchip Technology Inc.

5.14.5

DELAY BETWEEN EACH SCAN

CYCLE (TIMER[23:0])

During Continuous mode, SCAN cycles are processed

continuously, one after another, separated by a time

delay (TTIMER_SCAN), which is defined by the TIMER

ADC is automatically placed into a power-saving mode

(Standby or ADC Shutdown). The TTIMER_SCAN delay

offers better power efficiency for applications that run a

SCAN sequence periodically. Since the delay can be

very long, it allows synchronous applications with very

slow update rates without having to use an external

timer. The TIMER register defines the time, TTIMER_SCAN,

between each cycle with a 24-bit unsigned value going

from 0 to 16777215 DMCLK periods. Table 5-16 details

the TIMER possible values with respect to the

TIMER[23:0] code.

The internal TIMER counter will decrement from the

TTIMER_SCAN value to 0 and launch the new SCAN cycle.

If the TTIMER_SCAN value is greater than TADC_SETUP

(256 DMCLK periods), the device will be placed in ADC

Shutdown mode (ADC_MODE is set internally to ‘00’)

at each end of a SCAN cycle. When the internal TIMER

counter reaches 256, the device will start up the ADC

during a TADC_SETUP time to be ready to convert when

the internal counter reaches 0.

If the TTIMER_SCAN value is less than TADC_SETUP, the

part will be placed in Standby mode between each

SCAN cycle (ADC_MODE is internally set to ‘10’).

ADC_MODE[1:0] bits in the CONFIG0 can only be read

as ‘11’ by the SPI interface during the whole SCAN

cycle and in between SCAN cycles.

5.15

A/D Conversions Automatic Reset

and Restart Feature

When the A/D conversions are running, the user can

change the device configuration through the SPI interface

by writing any register. Some register settings directly

impact the conversion results and would lead to invalid

ADC data if they were changed within a conversion. The

device incorporates an automatic Reset and restart

feature for the A/D conversions to avoid these invalid data

to be generated. Some register writes with the SPI inter-

face during a conversion will automatically reset and

restart the A/D conversion with the new settings.

The automatic Reset and restart feature behavior

depends on the register bits that are written by the SPI

interface.

5.15.1

NOT CAUSING RESET/RESTART

The first group of bits does not generate any Reset and

restart. This group is composed of all the unused bits,

all the read-only bits and some digital settings, such as

CONV_MODE[1:0], DATA_FORMAT[1:0], CRC_FORMAT,

EN_CRCCOM,

IRQ_MODE[0],

EN_FASTCMD,

EN_STP and LOCK[7:0] bits.

5.15.2

CAUSING IMMEDIATE

RESET/RESTART

The second group of bits generates immediate Reset and

restart. The Reset is immediate, the restart is only valid

after a period of two MCLK periods (necessary to handle

the Reset and ensures that the restart is synchronous with

the master clock). This group is composed of settings that

do not induce an analog operating point change. This

group includes ADC_MODE[1:0], PRE[1:0], OSR[3:0],

GAIN[2:0], AZ_MUX, EN_OFFCAL, EN_GAINCAL,

IRQ_MODE[1:0], MUX[7:0] and DLY[2:0] bits.

The EN_OFFCAL, EN_GAINCAL and IRQ_MODE[1:0]

bits generate the Reset and restart only if they are

changed to a new value. An overwrite of the same

value has no effect. In SCAN mode, the Reset and

restart feature will just restart the current conversion for

this group of bits; the SCAN cycle is not modified and

not restarted. The MUX[7:0] bits can be changed within

SCAN mode without generating a Reset and restart,

since this register is a don’t care during SCAN mode.

The DLY[2:0] bits can be changed during the MUX

mode without generating a Reset and restart, since

these bits are don’t care during the MUX mode. The

OFFSETCAL[23:0] and GAINCAL[23:0] bits will only

generate a Reset and restart when written if their

corresponding enable bit (EN_OFFCAL, EN_GAINCAL)

is enabled.

The ADC_MODE[1:0] bits generate an immediate

reset and restart but only if they are overwritten with

‘11’ (in any other case, the conversions are stopped).

Depending on the part being in MUX or SCAN mode,

the reset and restart feature resets either the conver-

sion or the complete SCAN cycle.

TABLE 5-16:

TIMER DELAY VALUE

BETWEEN SCAN CYCLES

TIMER[23:0]

TTIMER_SCAN

Delay Value

(DMCLK Periods)

111111111111111111111111

16777215

111111111111111111111110

16777214

100000000000000000000000

8388608

000000000000000000000001

000000000000000000000000

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