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TAS5822MDCPR bảng dữ liệu(PDF) 28 Page - Texas Instruments |
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TAS5822MDCPR bảng dữ liệu(HTML) 28 Page - Texas Instruments |
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28 / 90 page  Table 7-3. Analog Gain Setting AGAIN[4:0] GAIN (dBFS) AMPLIFIER OUTPUT PEAK VOLTAGE (VP/FS) AMPLIFIER OUTPUT PEAK VOLTAGE (dBV/FS) 00000 (Default Setting) 0 (Default Setting) 29.5VP/FS (Default Setting) 29.4dBV 00001 -0.5 27.85VP/FS 28.9dBV 00010 -1.0 26.29VP/FS 28.4dBV 00011 -1.5 24.82VP/FS 27.9dBV ……. …….. ……. .... 11111 -15.5 4.95VP/FS 13.9dBV Table 7-4. Example of Analog Gain Setting (Based on 6Ω speaker Load, take 0.5Ω loss for PCB, Speaker wire, Inductor DCR and RDSon) DAC Input (µDSP Output) dBFS Full Band AGL Threshold dBFS PVDD V Book0/Page0, Register 0x54, AGAIN[4:0] Gain (dBFS) Amplifier Output Peak Voltage V Amplifier Output Peak Voltage dBV 0 0 24 00101 -2.5 22.5V (Without Clipping) 27dBV 18 01010 -5 16.6V (Without Clipping) 24.35dBV 13.5 01111 -7.5 12.46V (Without Clipping) 21.9dBV -2.5 -2.5 24 00000 0 22.5V (Clipping or not, depends on AGL time constant tuning) 27dBV -5 -5 18 16.6V (Clipping or not, depends on AGL time constant tuning) 24.35dBV -7.5 -7.5 13.5 12.46V (Clipping or not, depends on AGL time constant tuning) 21.9dBV 7.4 Device Functional Modes 7.4.1 Software Control The TAS5822M device is configured via an I2C communication port. The I2C Communication Protocol is detailed in the I2C Communication Port section. The I2C timing requirements are described in the I2C Bus Timing – Standard and I2C Bus Timing – Fast sections. 7.4.2 Speaker Amplifier Operating Modes The TAS5822M device can be used in two different amplifier configurations: • BTL Mode • PBTL Mode 7.4.2.1 BTL Mode The familiar BTL mode of operation uses the TAS5822M device to amplify two independent signals, which represent the left and right portions of a stereo signal. The amplified left signal is presented on differential output pair shown as OUT_A+ and OUT_A-, the amplified right signal is presented on differential output pair shown as OUT_B+ and OUT_B-. 7.4.2.2 PBTL Mode The PBTL mode of operation is used to describe operation in which the two outputs of the device are placed in parallel with one another to increase the power sourcing capabilities of the device. On the output side of the TAS5822M device, the summation of the devices can be done before the filter in a configuration called Pre-Filter Parallel Bridge Tied Load (PBTL). However, the two outputs can be required to merge together after the inductor portion of the output filter. Doing so does require two additional inductors, but allows smaller, less expensive TAS5822M SLASEV8 – DECEMBER 2020 www.ti.com 28 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: TAS5822M |
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